Worlds first risc-v linux development board is here!

sifive.com/products/hifive-unleashed
The price is fucking high though.

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youtube.com/watch?v=wPrUmViN_5c
developer.nvidia.com/embedded/buy/jetson-tx2-devkit
youtube.com/watch?v=zXwy65d_tu8&t=625t
youtube.com/watch?v=odUZphPRKDA
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>4+1 Multi-Core Coherent Configuration, up to 1.5 GHz
>8GB DDR4 with ECC for serious application development
>Gigabit Ethernet Port
>32MB Quad SPI Flash from ISSI
>MicroSD Card for removable storage
>FMC Connector for future expansion with add-in cards
not bad!

> DDR4 ECC
Well no shit it's $1000

Yeah that + it having a practical monopoly on RISC-V SoCs until lowRISC comes out pretty much explains the price.

Better than the usual open-source dev board bullshit that loves using decade old out of date hardware

in what way is this better?

>the only thing holding me back from producing worthwhile software is proprietary instruction sets

Sup Forums actually believes this

...

Actual industry-wide support that's growing with a stable stream of developers actively maintaining code in such a way as to have a real future. Plus it's the real McCoy; fully open architecture, which with the level of support spells good things for its future adoption.

Let's people know there actually trying to be serious in being something that can compete with contemporary solutions.

>loves using decade old out of date hardware
This has no (((GPU)))

>Better than the usual open-source dev board bullshit that loves using decade old out of date hardware
For $1000 I sure hope that it's better than the usual sub $50 dev board.

>RISC
>Not CISC
why live?

>999 dollars

INTO THE TRASH IT GOES

>he wants his architecture to be bloat

>all integrated dev board
Put it into the garbage next to the other thousand.

If RISC wants to get a bite from the desktop market then they should make real expandable and upgradeable motherboards.

Why would I use this board compared to 32GB ram computer with real shadders?

Already getting their famerino

>If RISC wants to
RISC-V is not a singular entity, as you may be used to with the legacy x86 architecture. You don't have one or maybe two companies calling the shots when it comes to implementations of this architecture. Any group can make stuff using the RISC-V standard, and this just happens to be the first.

That's ARM, which is certainly a RISC architecture, but is not "RISC-V".

Also, I want one!

So future is less performance, more expensive, I got that.

>he wants to use an architecture that was abandoned years ago

Risc is the future

see

quote it right you dumb faggot

What's your point?

>being this new
RISC-V doesn't need a GPU

>he wants to use an architecture that was abandoned years ago
Ok, you really need to separate "RISC" from "RISC-V".
RISC is a principle that has existed since the 80s or even earlier. There have been multiple RISC architectures throughout the years.
RISC-V is an ISA that was developed in 2010.

youtube.com/watch?v=wPrUmViN_5c

...

It can have PCI-E and as such just use your AMD GPU, somebody just needs to rebuild the drivers for Risc-V.

not him but everything you say makes no sense.

>RISC-V IS THE FUTURE
>companies start using it
>turns into a pseudo CISC ISA like modern x86 that's 99% proprietary essential instructions
>no one can use it because of the legal minefield

Backdoors?

Why not?

Why?

Yes, but the potential is there for pairing RISC-V processors with conventional GPUs over PCIe.

> Legal minefield
> BSD license

Nine Hundred and Ninety Nine US Dollars

Fuck that I'm joining the botnet

Here's the thing risc-v is a fixed ISA and software is compadible no matter the CPU.
Meaning changing it in anyway for a proprietary vendor would be not only pretty hard (since there are other vendors doing the same thing) but it also would be pretty costly.

Where are the VRMs? where are the MOSFETs?

What the fuck? POWER, SPARC, and ARM are all RISC.

Oracle abandoned sparc

and all of them are dead except ARM that only continues to exist because it's entrenched in its markets in the same way x86 is

What the fuck does this even mean? There's absolutely nothing stopping you from extending the ISA, it's half of the point of something "open" to be able to modify it and configure it to your use case.

Interesting factoid: RISC-V is based on a mips subset called DLX

Remember when SGI was pushing NT on mips?
hah. good times

Give me a TL;DR about the advantages of RISC-V compared to ARM?

fuck that crap, I just wait for Elbrus-16s

POWER is alive and well in big iron servers. I think POWER9 came out just now.

Yeah, because of vendor-locked shops and legacy applications. Same shit with SPARC and Itanium.

>SPARC and Itanium.
both EOL'd

Yeah, dead. That's what I'm saying.
You'll still be able to buy them and Oracle just announced another SPARC chip (probably the last) but nobody is buying them but people with legacy software.

No. It's because they provide a scale-up solution that's rivaled only by mainframes.
A POWER8 E880 server has a maximum of 4 quad-socket 5U modules for a total of 192 cores/1536 threads (8 threads per core), and all of that can be partitioned in any way you see fit and runs AIX, SUSE, or RHEL. Pretty great if you want to consolidate large SAP and database instances.

>GPU
You mean BPU?
Blockchain Processing Unit?

>blah numbers blah buzzwords blah blah blah
Nobody cares about those kinds of systems anymore, if they do they’ll go for mainframes.

POWER systems in 2018 are the kind of shit you throw a handful of in the corner of your data center to handle mission critical/legacy apps while commodity systems handle everything else. The market for them is not growing, it’s shrinking as it has been for decades and most customers would love nothing more than to get away from them. Their sky-high costs far outweigh their 10% performance advantages and extra 0.0001% uptime.

>Implying you can't run modern (and useful) software on SPARC

Need a quick rundown on RISC vs CISC and why it matters. Also, a detailing of the obvious compatibility issues w/ RISC vs X-86 and what warrants the leap? Linux work? standard posix libraries? What doesn't work?

1.5Ghz ... -_-) fuck me in the ahole nigga

I WANT IT SO MUCH FUCK

At this point in time all CPUs are RISC internally. Pretty much all CISC architectures since the P6 and the K6 have been RISC internally.
And yes, the Linux kernel does work on almost all RISC archs. The only things that don't work on RISC these days are win32 programs, even fucking Windows itself runs on ARM. The only thing stopping widespread RISC is Intel and their jewish tricks. Like threatening Microsoft so they can't use an x86 emulator on ARM platforms.

I never said you couldn’t, but nobody spending six figures on a brand new M7 is planning to run fucking Debian or some barely functional NetBSD autobuild. They’re buying it to run applications they can’t run just as fast or faster on any boring old piece of commodity hardware.

>Need a quick rundown on RISC vs CISC and why it matters.
RISC is easier to implement, write compilers for, verify, harder to accidentally put security holes in, etc.
CISC supposedly has performance benefits because you can have more specialized hardware and fewer instructions, but I don't know if that really materializes, from what I've heard x86 is implemented with a RISC backend anyway.

>Also, a detailing of the obvious compatibility issues w/ RISC vs X-86
There is no compatibility. Keeping compatibility with x86 would be useless and impossible. Anything open source you can just recompile for RISC-V and anything closed source almost certainly depends on libraries for either Windows or Mac meaning you'll never get it to run even if you can execute x86 instructions (somehow, that's no small feat and almost certainly illegal without an x86 license).

>what warrants the leap?
Both x86 and ARM are currently proprietary architectures, this limits chip development to a couple companies (literally two in x86's case) that are large enough to be able to afford the licenses. This is not good for competition, hardware freedom and openness or pretty much anything else.

RISC vs. CISC means nothing in 1995+23, the interest in RISC-V is mostly due to its openness.

There to the top left of the socket under the heatsink looks like only 3 phases judging by the 3 chokes which is plenty for anything around 90-100W power consumption

>if they do they’ll go for mainframes.
Hardly. Mainframes are a huge investment that won't pay itself off unless you really need the extra reliability. It's also harder to find people to administer it.
Which is why big iron UNIX exists, a middle ground between mainframe insanity and commodity trash.

>mission critical
Mission critical isn't about the hardware and hasn't been for some time. That's the real buzzword.
Today it's mostly handled by throwing a cluster at it and hoping for the best.
I mean, sure, Itanium and POWER systems are phenomenally more reliable compared to x86, but not enough to be a be-all-end-all solution and they cost more too. x86 + cluster is cheaper and ultimately more reliable if configured right.

Usually, the niche of the good old big iron is in virtualization of big enterprise databases and applications where at some point it becomes more efficient than commodity servers. At least that's how it was with Intel. Now that AMD is back in business, I wonder how it will stand up to POWER once they scale past two sockets.

Is that why google is getting POWER9 servers, because they are locked in to legacy applications?

They want to scare inshill into better prices, but all of their software is opensource or in house so it really doesn't matter what architecture they run it on

>BSD license
So, how long till Intel EEEs this?

How would they?

cavium is backdoored... sorry "enabled".

>inb4 did everyone forget?

i get it though.

tell me moar

Ask Appelbaum.

developer.nvidia.com/embedded/buy/jetson-tx2-devkit

SUPERIOR AND HAS A REAL GPU AND MUCH CHEAPER THAN $999 GARBAGE

Thank you anons for your breadful replies.

I'll be looking for a diverse range of alternative architectures in the future namely on the trend towards more openness, simplicity, and cutsomization so while $1k is a bit steep for my now, I hope this goes somewhere. I've really been looking forward to some new many core architectures to shake up the GPU compute market. I heard some years ago about some exciting new architectures/chips in the pipeline. I hope they come out shining in the years to come. As long as it runs re-compiled C code fine and can run linux and its standard libraries, I think its a go... Fuck windows and closed binary blob drivers.

Why does a fucking dev board need ECC, let alone DDR4? I'm not expecting to run super stuff on a dev board.
The design of this is completely out of whack.

I really want a RISCV dev board, but I'm definitely not going to pay a thousand bucks for one.

Not even that bad. I'm tempted to order one.

This isn't about software at all, Windows motherbreather. You stupid fuckers always show up to shit in these threads at the fist mention of Linux. Just die in a fire already. Nobody likes you dumb Sup Forumstards.

>it's the real McCoy; fully open architecture
oblig
youtube.com/watch?v=zXwy65d_tu8&t=625t

you know what would be great?
risc-v inside of a thinkpad (T60/x60 preferably)

Unlike most other dev boards this is using a recently developed CPU on a 28nm process so it's going to have a DDR4 controller also with the ECC the best way to show it can support ECC is to have it on the board.
The reason for the $1000 price tag is it's a new CPU made in limited numbers and it's the first linux RISC-V processor so it's going to be high just because it's the first

not that guy but hold on I thought they produced cheap silicon for the CPU thats why it is in 28nm.
I remember in a talk saying its like really cheap.
Let me try to find it

Well this is the video
I believe the price is mentioned in the Q&A segment
>youtube.com/watch?v=odUZphPRKDA

...

From what I gather the only cheap silicon they mentioned is for the IoT/microcontroller stuff which is 180nm. 180nm goes back to the era of the Pentium 3.
Custom silicon for 28nm is never going to be cheap especially for the low numbers for the Freedom Unleashed

I was being sarcastic. Why don't they go with epyc instead of the ibm jew instead, it would be much cheaper.

>(((Nvidia)))
>(((ARM)))
Yeah, so superior.

That being said, look at how much diespace the decoders take even in such a relatively late design as Nehalem.

That's why intel is unable to compete with perf/watt at the low end; there are still clear advantages to RISC nowadays, especially with cpus being too fast for ram to keep up. This can be seen with ARM's thumb instructions that try to pack more instructions into less space.

>This can be seen with ARM's thumb instructions that try to pack more instructions into less space.
You may not be aware, but ARM explicitly removed both Thumb and ldm/stm instruction (together the main mechanisms by which ARM programs were compressed) with AArch64, implying that fetch bandwidth actually isn't such a huge deal. RV-C is also an optional extension.

>$999
dropped

I reckon that's a 60W-ish 2+1 arrangement. Notice how few caps there are on the CPU side of the filter.

Hmm, didn't realize that, maybe the transition from ddr3 to ddr4 speeds facilitated that decision. Wonder how saturated a 3-4ghz arm processor's pipeline would be.

It would mean breaking compadibility with everyone else(consumers will hate you for this). Having to to create a new software ecosystem(expensive as fuck). Also your cpu then is not really risc-v it's a different ISA based on risc-v.
For example imagine forking linux ,making it incompatible with normal linux and on top of it adding a bunch of proprietary add-ons. People would tell you to fuck off(even the travesty that is android uses the normal linux kernel.)

More likely, the performance-related parts of programs fit in the I-cache anyway. The addition of µop caches in later architectures probably also help a lot.

It's a dev board you idiots you are not the target audience. Risc-v is not even on mainline kernel yet.

It's still not mainline? I thought they were gonna be in by 4.15

I'm pretty sure it did get added then.

I remember years ago when RISC V was theorized and Sup Forums said it might never actually exist and is just a concept

so now that it does exist. is it really insanely better than everything?

>CISC is bloat
You may want to read up on IBM s/360 assembly, commonly held to be a pinnacle of CISC design. It has of course become bloated after 50 years of evolutionary development, but in its origins it's surprisingly elegant; almost RISC-like at times, with instruction formats that are designed for efficient decoding (even though they're variable-width), a fairly large set of GPRs (especially for its time), an architecture which is surprisingly close to being load-store (with only some read-only-operands being allowed to be memory operands, which is arguably efficient today from a code compactness perspective; store instructions are always explicit), no special purpose registers, no ISA-defined stack, branch-and-link instructions for subroutine calling, &c&c. There are a few 1960s oddities, of course, but if they were removed, I reckon it would count as a pretty modern and good ISA.

If all you care about is openness it's better than everything else but from any other standpoint it's not really able to compete with anything, not in price, not in performance, not in support.