Will Sup Forums help me with my Computer Architecture exam?
This sequential circuit is made by a master-slave bistable (type D) where D is the input and Q is the state/output.
D = I XOR Q
Z1 = NOT Q
Z2 = Q AND D
The fuck am I supposed to do? My teachers' explanation is SHIT and my textbook (Patterson/Hennesy) doesn't seem to discuss the subject.
Thank you.
Here is another.
Same kind of circuit.
D1 = !Q1
D2 = !Q2 (I !Q1 + !I Q1) + Q2 (I Q1 + !I Q1)
How do I compute the expression. I got I need to check the minterms and the maxterms, but then what?
I am so confused. Sorry guys.
you just draw the logic levels at whatever times. D flip-flops update on the rising edge of the clock.
You should build this in Logisim, and toggle the inputs so you can see how this all works.
Okay. So for the first clock tick D goes up, Z1 goes up and Z2 goes down. I'm okay until there. But then? How does Q behave for the second clock tick?
I think I found out that Q just follows the state of D on the rising edge of the clock.
But for the second exercise how am I supposed to evaulate the expression in human times?
Thank you.
play Shenzhen IO
thank me later
I have this exam in two hours. I know: I am an huge faggot and I underrated the exam. Could you suggest me something will help me understand this quickly? Thank you again.
up means 1
down means 0
I am asking how to make that expression simpler, I am familiar with truth tables. Thank you.
change I to another name
it's really annoying to look at
I!II!I
I already said thanks to those cucks of the department. This doesn't however solve the problem.
D2 can be simplified into
I !Q1 !Q2 + !I Q1 !Q2 + Q1 Q2.
this is just the first term distributed plus the second term simplified since
Q2 I Q1 and Q2 !I Q1
is just Q2 Q1
>Q2 I Q1 and Q2 !I Q1
>is just Q2 Q1
Why this?
The first expression is only true when both Boolean are 1. Same for the second. Draw out the truth table if you have trouble seeing that
When you distribute it, you get
Q2 I Q1 + Q2 !I Q1
As long as Q2 = 1 AND Q1 = 1, you don't care about I. If I is 0, the first term will be 0 and the second term will be 1. If I is 1, the first term will be 1 and the second term will be zero. Regardless, one of the term will be 1, and since they are ORed, you will always get 1 for Q2 Q1.
>When you distribute it, you get
>Q2 I Q1 + Q2 !I Q1
Why is it not
Z2 = !Q2 (I !Q1 + !I Q1) + Q2 (I Q1 + !I Q1)
→ !Q2 I !Q1 + !Q2 !I !Q1 + Q2 I Q1 + Q2 !I Q1
I meant when you distribute the second term of D2.
Sorry, I still have to have my coffee.
Thank you. I think I go that.
PoliMi with Breveglieri?
>D is the input
>D is not given in the diagram
>D is alone on the left side
This entire assignment doesn't make sense to me.
This is because the bistable is part of a bigger circuit.
Z. is that you?
Pelagatti this year. Things got shittier and shittier.
Jesus fuck what are the odds?
No I'm in 5th year now, we probably don't know each other.