AMD Zen die shot

Let's turn away from benchmark bars for a while and discuss what technolo/g/y is actually about.

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fat cache

What is the blue stuff?

is that mold? what would happen if I ate it?

You would get superpowers. And by superpowers I mean cancer.

are these damage control threads made by genuine intel shills or amd shills sockpupetting?

a diagram would be nice

CPU dies are made of scorpion. That's the die under UV light.
Honestly how do you not know this shit?

>born to shitwreck

Uncore and interconnects on lower metal layers.

Its pretty straight forward.

breakdown of the CCX

structures within each core

CCX/core size and basic process BEOL metrics

holy shit how do we get that many scorpions so reliably?

>tfw majored mech E instead of comp E

Massive processing facilities exist that create discs of bait that attract the scorpions. These discs are often called wafers.

Zen sure has a lot of un-core. I guess it's to be expected consider it has an integrated south bridge and a bunch of Hyper Transport links for those 4 chip MCMs that Naples uses. Pic related is Haswell-E.

>Discussing die shots
>Damage control

>64kB IC
That's where you're wrong senpai

Ditto.

This stuff us still interesting, but not as enjoyably and mech for me.

I don't think AMD is wrong about their own arch, guy.

...

So line down the middle TIM spread method?

No, dot in center. Do you understand how spreading works? If you apply the correct amount it should cover most of the die.

>technolo/g/y
>Sup Forums

So that's where that comes from

Have you looked at where the cores are in op's pic?

The die is mounted in the center of the package under the heat spreader. A dot in the center will cover the entire thing.

AMD still uses solder for its heat spreaders.
If you try to delid a Ryzen, you're probably gonna have a bad time.

I'm talking about the TIM between the heat spreader and heat sink

pugetsystems.com/labs/articles/Thermal-Paste-Application-Techniques-170/

this. the actual Zeppelin die is roughly 10mm*20mm, so the amount of paste you need is on the order of several mm^3 at most.

The point of TIM is to keep direct contact between surfaces where possible but to fill in the microscopic crevices where there would otherwise only be air. Too much TIM just reduced the direct contact and functions as an additional insulation layer.

Pixel counting gives about 197mm^2 for the whole die. Meaning they can probably get about 250 dies for a 300mm wafer. For $8000 per wafer, it would put about $30 per cpu with 100% yields. I would guess their yeilds are above 50% right now, probably close to 80%.

We are looking at margins of 70-80% for each CPU.

>not soldering your heatsink onto your CPU's IHS
It's like you want shitty temperatures.

how hard to reverse engineer a chip, if Intel were trying to

For something on the scale of a multicore near-SoC?
extraordinarily.

Even with the right x-ray and layer-peeling/slicing equipment to record all the logic structures and build a simulation, it's not an easy task to tell what the fuck something is even doing just by observing transistor-level state transitions. There are no little etching on the substrate saying "this cluster of flip-flops and logic gates are part of internal control path XYZ, stage 3", etc.

Intel likely wouldn't bother, there's not enough to gain to justify it. A smaller firm might but they'd have to have a license to sell it anyway. Cyrix managed to reverse a Pentium but that was a more simple chip design though. Zen is a complex chip, it would probably require years of research to decipher it putting it well past the point of being profitable. By the time you reverse it and make something functionally equivalent Intel or AMD would have something superior.

It would be cheaper to just develop your own, there's a reason why China and USSR/Russia stopped cloning microprocessors

Since there are like a dozen AMD threads today, I have a question maybe one of you can answer

Did their whole encrypted ram controller idea pan out?

You're crazy if you think Intel is afraid of AMD.

Dell isn't going to put ryzen in their laptops. Enterprise bought into vpro and they like it. Everything runs on esxi and esxi works best with Intel.

Intel has been working on making great processors for most people. Light on power. Hardware acceleration for the things that count.

They might lose to AMD for 2-3 years here in the least important market of enthusiasts. Yawn. Their $15k Xeons still have no competition. Their $20 i3's still have no competition.

No, Sup Forums is for: Sup Forumsays shitpostin/g/

>What is Naples

Now tell me how that won't work out

Are the R3 Zen chips the same die with one cluster of cores disabled, or a separate 4 core die?

ChemE/Materials here.

I did some semiconductor fab work, shit's pretty cool.

I was almost a process engineer for Intel but decided working full shifts in the clean room would be hell for me personally. Looking back I definitely made the right decision.

Still wish I could interact with that kind of technology though. The machinery they have in fabs is insane.

>what is Naples
>what is AMD telling in every single fucking presentation that their target was enterprise
>20$ i3's
wew is the Intel shill stroking?
All the Ryzen chips are made from the same die, which is Zeppelin
4 and 6 cores are made from disabling cores

>still has a micro controller inside that fucks over your freedumbs and can't be disabled
>we can now disable the intel management engine on some chips
Into the loo it goes!

I don't understand why anyone uses esxi/vmware now that KVM exists.

Some theoretical attacks against it were demonstrated but they all require a malicious host OS. So at least you're protected from malicious "sibling" VMs, which is a good start.

I think the 4-core Zens are actually using both clusters, but half of each. Don't quote me on that though.

That's just silicon costs. What about the manufacturing costs?

Thats how cost per die is calculated, manufacturing cost is factored in.
The only additional expenses are validation/testing/binning and packaging.

Fuck so Intel maki g 200%+ markup is true then

Intel is a super high margin company, its how they became a $50,000,000,000 a year company.
High performance CPU dies usually cost $20-$50, and they'll sell for a couple hundred, even up to $350 for intel's mainstream quad core chips.

My question is why AMD put the memory controllers on opposite corners of the die like that.

Those are PHY, not memory controllers.

Still, my question stands: Why put them on opposing corners of the die like that instead of on the same side?

Wire length, thermal considerations, die layout isn't arbitrary.

How would one go about this? Is there a certain solder that should be used?

Probably heat up the contact point of cooler (perfectly cleaned, of course) to 200°C, add that shit that gets rid of oxygen or something (google translate says 'rosin', I've never heard that word before, so it's probably wrong), that mostly eliminates air bubbles and helps make contact greatly.
Then melt solder using a soldering station right over the cooler and quickly slap on CPU (IHS has to be perfectly cleaned and 'rosin' applied as well). Make sure you didn't slap it on at an angle which would make mounting the cooler too hard.

Take the motherboard and cut off the little arm so that it's no higher than the lowest point of the cooler. Put the CPU with the cooler in the socket, somehow reach for the arm and pull it down, mount the cooler and pray that there aren't any bubbles between the cooler and IHS. Then wonder why did you bother because your temperatures didn't miraculously decrease by 20°C.

Sounds about right. I plan on doing it with a watercooler. Rosin is a thing. It's a resin. But I think the word you're looking for is flux.

Yep that's the word. Might want to find out what solder has the best thermal properties. Tin apparently has almost twice the thermal conductivity over lead. So you'd want lead-free solder, maybe?

This is a monster, in a good way.

>blue die
INTEL ALWAYS WINS BABY

I wish I could understand this stuff. I just got started on learning boolean gate logic and hit a wall with boolean algebra and hexidecimal. I'm nowhere near micro architecture theory and even a bare bones explanation on basic general purpose computing goes well over my head.

How can I learn, Sup Forums? I spent a month or so going over basic components and electrical theory, another month going over gate logic and addition, and another few weeks on basic circuitry, but I feel like a caveman dropped of in a city center with this shit.

You're a brainlet. Accept it and your life would be easier.

stay curious and genuinely interested

There's some tubes of thermal conductive paste in the stockroom where I work (I'm a sort of team supervisor/basic maintenance person. I'm supposed to call real maintenance people for big jobs but I only do so when I know they can grab parts quicker or it's something I can't troubleshoot through).

It's used to both improve balancing of heat on 170c+ rollers responsible for melting glue on packaging as well as provide a contact point for temperature probes to take acurrate readings from.

It looks exactly like thermal paste, but according to our inventory system it costs a couple hundred dollars per tube.
Anyone know if this would make a good thermal paste? I could probably get a spare tube off the maintenance guys.

If AMD is so amazing why don't they release an extremely cheap 2-core/4-thread CPU to see their power in small-scale gayming? Are they scared it will be exposed that they are still shit in single-thread performance? The meme that we don't need faster cores is literally the shit they tried to pull last time.

Any good resources you can suggest? I really enjoyed allaboutcircuits and electronicstutorials up to a point, referencing other sources when I needed things dumbed down a bit to get a starting point, but I haven't found a better alternative for CPU design and theory. All too many seem to assume a minimum level of knowledge and I'm having trouble flipping back and forth trying to learn individual terms. I need something more gradual. I've done this all sans formal schooling and have had a blast picking up these new concepts at my own pace.

They're releasing quad cores, with 8 threads, at dual core prices, at dual core IPC and you're fucking complaining about it

users pay for R&D.
i think it's how it should be

if we sell at communism prices, technology will get stale

Intel users have been paying for awful business decisions for nearly a decade. Getting minuscule improvements at a retarded premium because the company responsible thinks they can do as they please.

Meanwhile AMD is trying to completely rethink the entire CPU design process and make waves by completely fucking up the entire market.

THAT'S how I think things should be.

Been looking for a bit. Can only find people that have considered doing it.
I can't imagine that heat alone will break the CPU. In fabs they use processes that'll heat wafers to 1000c (surface level). I'm pretty sure the real killer is electric flows becoming unstable at high heat causing a short.
With using a water block heat isn't much of an issue because of the small amount of metal that will have to be heated. My concern would be distortion of the block causing leaks.
With a regular air cooler the heat can still be mitigated by using additional heat sinks around the CPU itself. Drawing off heat from the edges of the IHS.

The sort of solder that can be used for this is a wide range. Too much for a night of research to get through. I'll even consider the uses of other metals such as gallium. But yes lead is a big one to stay away from.
There's also many fluxless solders that would be suitable, making the process much more simple. I'll even look into chemical welding.

If I've got the cash spare I'll even get the parts machined to add greater surface to assist in heat transfer.

They will, later, in a new APU family.

...

But the cost difference between one cpu over the other is not huge.
We accept that the fast ones is more expensive because development goes into it.

>users pay for R&D

Fairly sure most of it is gonna get trashed in real use

4core ryzen has 8MB of l3 cache, so it's probably a CCX cut off, whilst 6core chips still have the full 16MB of l3.

Each core has its own L3 slice.

>Competitor A
Heh, as subtle as a brick to the face.

>Dell isn't going to put ryzen in their laptops.
No one is going to put ryzen into any laptop, ever. You're an idiot, user.

No, the l3 cache is shared. See

Did Su mention "ryzen mobile" in her presentation near the end? I might have imagined it though it might mean the desktop APUs might keep a ryzen branding,

I'm only going off all the 4core leaks saying they have 8MB of l3. If they're also true with 16MB on the 6cores, then it means the associated slice doesn't have to be disabled when a core is disabled, but the 4core sku is a whole ccx disabled.

Each core has its own L3 slice. The cores access other slices through a ring buffer.
The L3 is a victim cache, and that means something is only written there if it is first written into the L2.
If a CCX only has 3 active cores, then it only has 3 active L3 slices. No core means no l2, and that means nothing to address the L3 victim slice.

4 core chips only have 8MB of L3.
6 core chips have 12MB.

>tfw my 5775C has 128MB of L4$
>destroys Ryzen, Broadwell-E, and Kaby Lake with cache performance and access times
kek, AMD can't catch a break, can they?

$1 has been deposited into your Intel shill account.

Find a MOOC on digital logic design. Then find another one on computer organization and architecture.

In college I took a class where we learned about things like CMOS, grey code, K-Maps, etc. And another class where we discussed CPU design, pipeline stages, Tamasulo's algorithm, cache design, branch prediction & speculative execution, using the MIPS architecture as an example.