Yesterday there was a thread
where I was posting in it
Then I was made aware by
That what I know, may not be common knowledge.
Threadripper does not use spacers, they use actual dies.
Now, are these connected, are they functional, are they disabled by hardware or by firmware? fuck knows at the moment, but we do know this, all threadrippers have 4 ryzen dies.
Prepare for 2007 shit
UNLOCK YOUR CORES
Motherboards
This might be pretty cash
I have no doubt that some of the dies used are crap ones, but the process they use gives such high yields, would they have enough broke dies to make threadripper in the quantities they have?
>threadripper uses four dies for a marginal advantage over intel
>intel uses a single die, on the odd occasion two
Why doesn't Intel just add two more dies and make their CPU 2x better than AMD again?
2x the TDP
They'd have to drop base clocks.
AMD is actually shockingly power efficient this time around.
fucking lmao
how do you retards find your way to this board
because that is just dick waving at that point.
intel has shit yields on their high end dies, while amd has fantastic yeilds on their smaller ones
intel has high tdp, amd could legitimately put ryzen un changed into a laptop with a 2.5ghz clock speed and may out do intel on tdp
now, you take a risk when you make silicon that they will fail
putting them onto the substrate is also a risk they will fail
now putting 2 on one doubles that risk while also introducing problems that may not be fixable forcing you to scrap one of the dies.
each high end die intel makes costs roughly 7-8000$ on its own before they mark up if I remember the pricing charts right. and because of how big the wafers are they may not get a single die on some of them.
intel cant logistically just add dies.
If someone figures out how to unlock them and overclock all 32 to 4GHz, it will be...........wait for it..........EPYC
Intel isn't releasing a scalable architecture until the next iteration (the mesh connections they keep bragging about). Current chips use ringbus.
Assuming you were able to unlock all cores and sit stable at 4Ghz you'd need some pretty damn impressive cooling. We're talking liquid nitrogen.
nah, nothing that extreme would be needed, or should be needed... did any of the liquid coolers get updates for threadripper? If one did, that cooler paired with 2 3 fan rads would likely be enough to cool a 4ghz 32 core cpu given how ridiculously efficient ryzen is, granted going passed 4ghz may be impossible, but 3.8-4.0 would easily be doable.
Hardware disabled and likely entirely nonfunctional in the first place (dies that have a major defect in the cores and/or uncore).
Look carefully at your image, you'll notice that the disabled dies have very little in the way of surface mount components right next to them whereas the active ones have a full set.
They're likely completely dead even if you actually put them on a viable substrate. They're probably dies that just failed completely so they called them "spacers" or "dummies" because they entirely useless.
entirely possible, not going to deny, but calling them spacers when they are ryzen dies implies something else.
from my understanding those are capacitors or resistors of sorts, if they were hardware disabled this way, soldering your own on, while a chore, would not be undoable.
now is it worth risking a 1000$ cpu to save 1000$ if a way to run 32 cores if ever found, as epyc is 2100 for 32 core single socket... thats a great question.
also, how necessary are the things they left off? are they there for memory controller or some other io output that a threadripper just doesn't have, and they are using a base epyc substrate no matter what for cost savings?
>how necessary are the things they left off?
Very, as they're the coupling hardware for the I/O and likely power.
but if the io isn't there, as in pcie lanes, or memory, how necessary are they? you see all around the die they have 2 rows of these, and if we assume that the ones in the corners are all going to specific cpus, ryzen, if i'm correct uses around 44, even the supposed spaces have at least 20, so this again begs how disabled are they and are they completely fucked, and if they aren't, how necessary are those components if they don't use the io or the memory controller on them?
Anyone got a de lid of an 8 core epyc? this would give us the best insight on what the hell is going on here as that epyc would be only 2 cores per ccx but with all the io still working.
Acktually Skyfire-X is using bingmesh.
I don't think it implies anything other than they're useless. It is not possible to run 4 dies from the sTR4 socket on the current motherboards anyway due to how the memory traces are connected. In other words even if you miraculously powered the dies they would have no electrical access to memory or infinity fabric connection to functional dies.
TR uses a separate substrate from Epyc according to AMD's product manager
and they also said that they were useing dummy silicon, never failed silicon. why, if they were not attached at all, would they have anything on them at all, when it seems that each die is working with just what's in its corners if a solo ryzen is anything to go by?
do you have proof of no infinity fabric connectivity? i'm not saying they are useful or even work, just that amd which has fantastic yields, is using the same socket that can handle a 32 core, 128 lanes and 8 channel memory so telling me that it cant facilitate 32 cores quad and 64 is kind of hard to swallow, and telling me that they are two completely different things from epyc to threadripper... sure, on the motherboard side but on the die/socket/package, that's on other people to prove.
Actually the new X series use megathreads, when meshed create a megamesh for multiple megatasking loads.
AMD uses infinitygimmick where they throw basically a bunch of shit on a wall and hope it sticks, its like dumping fertilizer on the dead half of your lawn with the hopes that eventually the grass will be able to use the dirt.
>Can explain but bullshitting it anyway because I hate X
Nice tripfag, now explain it properly
Something smells fucky. I don't trust AMD at all.
They probably just laser off the Epyc connections.
My bet, and would need to know how they test these at amd is this.
they have a rig of some sort that has all the shit to make an epyc and epyc, they press fit and test, can everything handle it at given specs? yes? then off to epyc, if no, can some of them perform good? if yes, then threadripper.
i'm interested in knowing if any of the extra dies are able to be accessed by bioses at all, time will likely tell us but its interesting.
I have a feeling it's more of a hardware we didn't put on the shit to make the cpus work then a laser step as that's extra processes and amd would rather cut down on that if possible.
They were probably too fucking poor to build multiple lines so they swap the same line back and forth to produce both, selling epyc at a huge markup and threadripper at a razer thin margin to try and gain marketshare from intel while simultaneously making no fucking money lol.
You're just grasping at straws and making up nonsense at this point. If you don't trust AMD's product manager then just buy a 7501 and check it yourself.
You won't because you have literally no idea what you're doing.
You know that you can look at the memory traces on the board and where it is placed on the socket, right? It only connects to 2 dies and only has 4 channels. This isn't hard but you are too retarded to figure out the basics.
piss away millions on something that will save them a fraction of a cent... yea... tell me how good intel's 300 million to diversity is helping them, i'm sure it will come through any day now.
got a link to a high quality image? I cant find shit besides low quality for reading detail 'aesthetic' shit or too small to see anything substantial images.
They told me they were dummy dies or silicon blanks, both terms used at different times, and now we can see they clearly are at the very best for their claims, failed ryzen chips.
I take nothing companies say at face value.
lol
Isn't failed chip technically a blank silicon?