Even GloFo has a denser process than Intel

>even GloFo has a denser process than Intel
They really, really DID fuck it up.

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intel btfo

>bumping a near-dead thread

But what about performance?

Yeah guess I'll go and buy a GloFo branded processor. Oh wait that doesn't exist you fucking retard.

The absolute STATE of kikes.

Losing their fab lead hurts Intel much more than getting bitten in the ass by Zen.
I think Intel spent around 20 billion in the last 5-7 years on fabs, around 20% of that on CPU R&D

Intel doesn't care for AMD and poozen, their fabs are also the best in the world.

And then BK woke up from his dream.

The chump dumped 50% of his shares in one night and gave a company wide peptalk how "everything is fine, Intel is taking more risks next year" a day latter.

Literal damage control.

yep

Intel business model used to be build the fabs and invent shit to fill the fabs.

Funny thing is AMD had to spin off glofo because they couldn't afford it... then came the mobile boom and everyone else had much more money to invest in better fabs than intel... and oh, steve jerbs had gone to intel first for an iphone chip and they'd said no. lel.

He's getting sacked no doubt.

HOPEFULLY
That piece of shit and his TMG buttboys deserve rope for killing Intel.

b-but Intel's 10nm is comparable
The time comes when they introduce their own 7nm, it will blow everything out of the wafer

>deserve rope for killing Intel.
But that's a great achievement, he should be awarded and declared the man of the year if intel goes bankrupt

Intel won't go bankrupt, but Intel we all knew will be gone forever.
Merely a shadow will remain.

Meanwhile everyone will sit on their ass for Intel to introduce EUV in 2021 and GaaFETs in 2023?

B-b-but my c-cobalt in 2 out of 13 layers... World's first.. Trust us if we had a choice to delay for 3 years again because of material fuckups and pride that are largely unimportant for the endproduct we would do it again

>Intel
>GAAFETs
>ever
Bohr and his eternal retardation will produce III-V fins so tall they will collapse.

The silly part is GloFo also using cobalt, but in a sane way: for contacts.

>The time comes when they introduce their own 7nm
And it'll be two years too late to impress anyone.

semiwiki.com/forum/content/7191-iedm-2017-intel-versus-globalfoundries-leading-edge.html

Glofo uses Cobalt as well.
Intel just fucked up(this phrase seems to have become the norm in the last year concerning more than just CPU projects)

Co for contacts =/= Co for M1/M2.

If it doesn't give them any electrostatic advantage over Glofo it was a waste of time, they already lost both density and cost and that's before Glofo brings out EUV

It'll give them *some* electrostatic advantages, but definitely not enough to justify Co for M1/M2.
And yeah, the situation is pretty dire for Intel: for the first time in history they do not have a node advantage.

Does 7nm LP have 9.5T performance libraries? Intel process has always been performance first even at the cost of density.

It offers 9T libs, along with different logic and metal stack for very, very, VERY high-performance products (think IBM ovens).

Well then.. Guess Intel is fucked in 4 holes by 16 core dies around 200mm2 probably made for pennies

So AMD will have a field day and not be capped by a low power node for their CPUs again?

You'll see that with Pinnacle, if AMD uses 7HPC for desktop Intel's lights are out since 10nm+ will clock lower than 14nm++

Yeah, Rome will be very cruel to ICL-SP.
64/128 with 256MB L3$ will be hard to beat.
No.
7LP is squarely a high-performance node.
Just look at the fins.

Pinnacle Ridge is 12nm

12LP is also probably a high-performance node.

They were going to dump 8 billion on a new fab, then went "lol why we're murdering AMD anyways, let's shelve it and save the money"

And now...

>ICL-SP

The thing is that will be end of 2019 at best..
Rome is EOY 2018, which means Cascade lake will get skullfucked.
By the time ICL-SP is out a Zen3 version of EPYC will be close.

Fab42 would not salvage the mess that is their 10nm process.

Rome is who knows when; probably H2 2018 sampling to 7+1, mid-H1 2019 for wide availability.
Looks like AMD managed to resurrect Andy because this level of paranoia is silly.

Considering the yields now will Intel be able to get out a 500mm2 die on 10nm, at all?

There's no hope, not even EMIB will save them.
OSATs will ass their cheaper packaging solutions by then, be it SLIM/SLIT/the Samsung one.

I don't speak moon, translate for me

Advanced packaging solutions for heterogeneous integration.
SLIM/SLIT/whatever Samshit is developing are using additional RDL level with contacts to create MCM without resorting to interposer.
Should be cheaper.

Its a marketing name for their slightly improved 14nm node

You can do a lot with a half-node.

IBM got a ridiculous 5.2Ghz on 14nm LPP with their hueg ass deep pipeline, wondering what they will do with 7nm

Not even glofo claims more than slight improvements

POWER is 12 stage.

I thought they used FDX or whatever the SOI node was, wasn't Finfet IIRC(probably don't)

GloFo claimed very vague basic node improvements.
Nothing about libs or design rules.
14HP=/=14LPP.

Glofo also didn't claim it's a phone SoC, because nobody uses 9T for phones

14HP is FDSOI-based FinFET.
Also he implied z14.
P9 only hits ~4GHz.

Oh right they had their custom node.

OP is denser than me, yet I run faster

You also cum faster.

>not having a chafed jew'd dick desensitized due to deathgripping
>bad

BK pls.

Pinnac!e ridge 4.9ghz confirmed

You mean 5.3Ghz

I'd be happy with current clocks but much reduced IMC latency and 3600+ support, that's what Zen really needs instead of balooning power draw.

Zen's IMC is throughtput-oriented.
Server first design as is.

Yes, but there's no reason not to reduce it, it benefits every single workload.

They need to deal with NOC latency first.

>steve jerbs had gone to intel first for an iphone chip and they'd said no
Probably for the best of both companies. Xscale was more embarrassing than NetBurst.

I though he implied fabbing SoCs and not using XShit.

NOC?

I want 50 stages worth of H Y P E R B I B E L I N E S back.
Do it Intel.

Network-on-chip. Zeppelin employs one, managed by (of course) Infinity Control Fabric.

Hell, I think one of the easiest uplifts they can get for chip-wide performance would be to improve that (and untie it from system memory).

>untie it from the system memory
More clock domains == more latency.

No reason to untie, it will naturally get faster with DRAM improvements and it's already pretty fast for a server first feature with 3200mhz.
It's never gonna be a ringbus in latency, but ringbus is not scalable.

>1930/40s
>IBM technology fucks up the Jews in Germany
>2010s
>IBM technology once again fucks up the Jews

HOW DOES IBM GET AWAY WITH THIS?

Pinnacle ridge die is unlikely to make it in EPYC or even TR, so what's the chance it will have 0 of the server stuff like GMI, 10G muxes, SEV/SME and whatnot?

Man, if AMD makes a seperate consumer die with TR but doesn't take advantage of the 7HPC for desktop they should really kill themselves, we would get so close to 6GHz chips.

With PR*

It's still Zeppelin
AND
TR will get a refresh later.

So what? It's not against the rules.

>we would get so close to 6GHz chips.
And even closer to 350-400W TDP.

No one minds when Intel does it.

>yfw 7nm will have Sandy Bridge longevity
what the fuck could they even move onto

But they would if AMD does it, but AMD could release such a CPU that's clocked lower but has significant overclocking headroom.
That would win you thr DIY market.

>AMD is sinking
>Raja jumps ship to Intel
>Intel is now sinking
It's the Raja curse.

AMD had its best 2 quarters in 6 years when Raja was at RTG

Specters of the past find no rest in their grave until they see justice done.

Many variations of GAA devices will the the ultimate stage of the CMOS transistor. Beyond this is anyone's guess as its still theoretical territory. Quantum junctions could be a thing, manipulating single particles.
Whats crazy to think is that we're one day going to reach the point where chips become so power efficient that we can passively power the equivalent of a desktop PC today on body heat.

Because buttcoins

How is that more cracy compared to what happened over the last half century?

>EUV
boards.Sup Forums.org/x

looks like intel 10nm is just a compact 11nm version of the previous one, and gloflo 7nm is just a better powered, 10nm version

There's one called AyyMD

>GAA
Vertical or horizontal? :^)

>EUV is spook
t. Intel

What a fucking moron. It hurts so bad having Intel cum under the hood huh?

So... 600W less than Intel? Sounds good

See the thing is Intel is actually capable of releasing CPUs on new nodes on time, AMD 7nm will be late 2019 while Intel will have 10nm in early 2018

>See the thing is Intel is actually capable of releasing CPUs on new nodes on time
Intel's 10nm node was originally supposed to go into production two generations ago, and neither Kaby Lake nor Coffee Lake was supposed to even exist.

Can't tell if that fanboy welin/welkin/whatever from twitter or that french architect guy that left Intel but still sucking them off.

Both suffer from brain damage so it's easier to just lump them together.

Weitkin, something like that. I've read it a million times and I still forget how he spells it. The guy is a major league sperd. Anantech forums, EEtimes comments, a dozen different sites, all he does is shill for intel.

dem fins

Are you sure about that?

I've seen that guy on twitter quite a lot, there's always Charlie, Ian, TMFChipFool, BitsNchips, etc involved in the conversations, his spats with Charlie are the funniest. Charlie is a professional shitposter.

And then BK woke the fuck up.